JPH0735414Y2 - 電子部品搭載用多層回路基板 - Google Patents
電子部品搭載用多層回路基板Info
- Publication number
- JPH0735414Y2 JPH0735414Y2 JP1989100948U JP10094889U JPH0735414Y2 JP H0735414 Y2 JPH0735414 Y2 JP H0735414Y2 JP 1989100948 U JP1989100948 U JP 1989100948U JP 10094889 U JP10094889 U JP 10094889U JP H0735414 Y2 JPH0735414 Y2 JP H0735414Y2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- prepreg
- annular spacer
- layer
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 125000006850 spacer group Chemical group 0.000 claims description 35
- 239000010410 layer Substances 0.000 claims description 21
- 239000012790 adhesive layer Substances 0.000 claims description 10
- 238000010438 heat treatment Methods 0.000 claims description 4
- 239000004020 conductor Substances 0.000 description 19
- 239000011347 resin Substances 0.000 description 18
- 229920005989 resin Polymers 0.000 description 18
- 239000007788 liquid Substances 0.000 description 12
- 239000011148 porous material Substances 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 238000006073 displacement reaction Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000007788 roughening Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000010615 ring circuit Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000001174 ascending effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989100948U JPH0735414Y2 (ja) | 1989-08-29 | 1989-08-29 | 電子部品搭載用多層回路基板 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1989100948U JPH0735414Y2 (ja) | 1989-08-29 | 1989-08-29 | 電子部品搭載用多層回路基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0339878U JPH0339878U (en]) | 1991-04-17 |
JPH0735414Y2 true JPH0735414Y2 (ja) | 1995-08-09 |
Family
ID=31649925
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1989100948U Expired - Lifetime JPH0735414Y2 (ja) | 1989-08-29 | 1989-08-29 | 電子部品搭載用多層回路基板 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0735414Y2 (en]) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014125894A1 (ja) * | 2013-02-15 | 2014-08-21 | 株式会社村田製作所 | 積層回路基板 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006179733A (ja) * | 2004-12-24 | 2006-07-06 | Casio Comput Co Ltd | 多層配線基板およびその製造方法 |
KR101297482B1 (ko) * | 2013-05-08 | 2013-08-16 | 이흥재 | 천정 빨래 건조대 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0722224B2 (ja) * | 1986-09-26 | 1995-03-08 | 三菱瓦斯化学株式会社 | Icチツプ搭載用多層板の製造法 |
JPH0722225B2 (ja) * | 1986-09-26 | 1995-03-08 | 三菱瓦斯化学株式会社 | Icチツプ搭載用多層板の製造法 |
-
1989
- 1989-08-29 JP JP1989100948U patent/JPH0735414Y2/ja not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014125894A1 (ja) * | 2013-02-15 | 2014-08-21 | 株式会社村田製作所 | 積層回路基板 |
Also Published As
Publication number | Publication date |
---|---|
JPH0339878U (en]) | 1991-04-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR20070084635A (ko) | 다층 프린트 배선 기판 및 그 제조 방법 | |
JP3225666B2 (ja) | キャビティ付きセラミック多層ブロックの製造方法 | |
KR960044004A (ko) | 다층프린트배선판 및 그 제조방법 | |
JPH0735414Y2 (ja) | 電子部品搭載用多層回路基板 | |
CN105393649A (zh) | 用于制造印刷电路板元件的方法 | |
JP5749235B2 (ja) | 回路部品内蔵基板の製造方法 | |
KR20100117975A (ko) | 임베디드 회로 기판 및 그 제조 방법 | |
JP5221682B2 (ja) | プリント回路基板及びその製造方法 | |
JP4060066B2 (ja) | 積層構造物の材料設計方法 | |
JPH0370194A (ja) | 電子部品搭載用多層回路基板の製造法 | |
JPH05160574A (ja) | 多層プリント配線基板およびその製造方法 | |
US20230054390A1 (en) | Interconnect substrate | |
CN112492777B (zh) | 电路板及其制作方法 | |
JP5359939B2 (ja) | 樹脂フィルムおよびそれを用いた多層回路基板とその製造方法 | |
JPH10303553A (ja) | プリント配線板の製造方法 | |
JP2793446B2 (ja) | 多層セラミック基板の積層プレス方法 | |
JPH06224557A (ja) | キャビティ付きセラミック多層ブロックの製造方法 | |
JPWO2007043165A1 (ja) | 多層配線基板及びその製造方法 | |
JPH06169172A (ja) | 多層プリント基板の製造方法 | |
CN120111776A (zh) | 一种多层式电路板和制造方法 | |
JPH0278253A (ja) | 多層プラスチックチップキャリア | |
JPH0758429A (ja) | プリント配線板の製造方法 | |
JPS6110981Y2 (en]) | ||
JPH0545079B2 (en]) | ||
KR970018447A (ko) | 반도체패키지의 제조방법 |